688 research outputs found

    Large-Scale MIMO Detection for 3GPP LTE: Algorithms and FPGA Implementations

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    Large-scale (or massive) multiple-input multiple-output (MIMO) is expected to be one of the key technologies in next-generation multi-user cellular systems, based on the upcoming 3GPP LTE Release 12 standard, for example. In this work, we propose - to the best of our knowledge - the first VLSI design enabling high-throughput data detection in single-carrier frequency-division multiple access (SC-FDMA)-based large-scale MIMO systems. We propose a new approximate matrix inversion algorithm relying on a Neumann series expansion, which substantially reduces the complexity of linear data detection. We analyze the associated error, and we compare its performance and complexity to those of an exact linear detector. We present corresponding VLSI architectures, which perform exact and approximate soft-output detection for large-scale MIMO systems with various antenna/user configurations. Reference implementation results for a Xilinx Virtex-7 XC7VX980T FPGA show that our designs are able to achieve more than 600 Mb/s for a 128 antenna, 8 user 3GPP LTE-based large-scale MIMO system. We finally provide a performance/complexity trade-off comparison using the presented FPGA designs, which reveals that the detector circuit of choice is determined by the ratio between BS antennas and users, as well as the desired error-rate performance.Comment: To appear in the IEEE Journal of Selected Topics in Signal Processin

    Flexible N-Way MIMO Detector on GPU

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    This paper proposes a flexible Multiple-Input Multiple-Output (MIMO) detector on graphics processing units (GPU). MIMO detection is a key technology in broadband wireless system such as LTE,WiMAX, and 802.11n. Existing detectors either use costly sorting for better performance or sacrifice sorting for higher throughput. To achieve good performance with high thoughput, our detector runs multiple search passes in parallel, where each search pass detects the transmit stream with a different permuted detection order. We show that this flexible detector, including QR decomposition preprocessing, outperforms existing GPU MIMO detectors while maintaining good bit error rate (BER) performance. In addition, this detector can achieve different tradeoffs between throughput and accuracy by changing the number of parallel search passes.National Science Foundation (NSF

    Low Complexity Opportunistic Decoder for Network Coding

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    In this paper, we propose a novel opportunistic decoding scheme for network coding decoder which significantly reduces the decoder complexity and increases the throughput. Network coding was proposed to improve the network throughput and reliability, especially for multicast transmissions. Although network coding increases the network performance, the complexity of the network coding decoder algorithm is still high, especially for higher dimensional finite fields or larger network codes. Different software and hardware approaches were proposed to accelerate the decoding algorithm, but the decoder remains to be the bottleneck for high speed data transmission. We propose a novel decoding scheme which exploits the structure of the network coding matrix to reduce the network decoder complexity and improve throughput. We also implemented the proposed scheme on Virtex 7 FPGA and compared our implementation to the widely used Gaussian elimination.Renesas MobileNational Science Foundation (NSF

    Reconfigurable Multi-Standard Uplink MIMO Receiver with Partial Interference Cancellation

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    As HSPA/HSPA+ and LTE/LTE-A evolve in parallel, the reconfigurability of a receiver to support multiple standards has become more and more important, especially for small cells. In this paper, we first suggest a reconfigurable multistandard uplink MIMO receiver based on a frequency domain equalizer. Then, to improve the performance, we propose two low-complexity partial iterative interference cancellation (IC) schemes to deal with the residual inter-chip and inter-antenna interference in HSPA/HSPA+ and the residual inter-symbol and inter-antenna interference in LTE/LTE-A. Compared with a receiver consisting of separate HSPA/HSPA+ and LTE/LTE-A uplink receivers, this reconfigurable receiver can save up to 66.9% complexity. Moreover, the two partial IC schemes have negligible performance loss compared with full IC scheme. They can achieve 2 dB gains in both standards with only 15.2% additional complexity to no IC scheme.Renesas MobileTexas InstrumentsXilinxSamsungHuaweiNational Science Foundatio

    LTE uplink MIMO receiver with low complexity interference cancellation

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    In LTE/LTE-A uplink receiver, frequency domain equalizers (FDE) are adopted to achieve good performance. However, in multi-tap channels, the residual inter-symbol and inter-antenna interference still exist after FDE and degrade the performance. Conventional interference cancellation schemes can minimize this interference by using frequency domain interference cancellation. However, those schemes have high complexity and large feedback latency, especially when adopting a large number of iterations. These result in low throughput and require a large amount of resource in software defined radio implementation. In this paper, we propose a novel low complexity interference cancellation scheme to minimize the residual interference in LTE/LTE-A uplink. Our proposed scheme can bring about 2 dB gains in different channels, but only adds up to 7.2 % complexity to the receiver. The scheme is further implemented on Xilinx FPGA. Compared to other conventional interference cancellation schemes, our scheme has less complexity, less data to store, and shorter feedback latency.Renesas MobileTexas IntrumentsXilinxSamsungHuaweiNational Science Foundation (NSF
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